Replies to post #33201 on Advanced Micro Devices Inc (AMD)

[sgolds]

alan81, while I'm no expert at this, I think you are not taking leakage into account. Each process seems to have a frequency range in which power consumption is fairly linear and then hits a point where leakage becomes a larger issue and power consumption is no longer linear. As I understand it, Prescott's power problems are an issue of excess leakage at the clock frequency where Intel wants to bin them.

Hey, but I'm just a software guy, maybe some of our hardware gurus can comment on the linearity of frequency vs. power consumption on a given process.

[chipguy]

What are you thinking here?

You have to appreciate that sgolds thinks that
individual FETs are somehow aware of pipeline
organization and MPU clock frequency and can
dramatically change their operational device
characteristics accordingly.