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04/27/04 12:56 PM

#33009 RE: pgerassi #32942

Pete, Re: Look at the way AMD specified the CPUs for TDPmax. They take the absolute worst case for Iccmax*Vccmax+Pht+Pio+Pdram. This is specified at most 35W. Banias 1.5-1.7GHz has a TDPmax of 33.8W (I included AGTL+ termination and PLL power).

Fair enough, but this is for an extreme voltage scaled part, equivalent to Intel's ULV Pentium M. Using the datasheet I linked to earlier:

http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf

They don't list the specifications for the 2700+ part, but the 3200+ part has an intermediate P-state that dissipates 35W at 1.6GHz, but as soon as they go to 1.8GHz, the power dissipation increases to 46W, and then to 62W at 2.0GHz. It doesn't take a Ph.D in computer design to know that they have only reduced the power in the 1.6GHz state using extreme voltage scaling. Banias, by contrast, reaches its power levels at full voltage and power operation. If AMD needs extreme voltage scaling just to compete, then they will be incapable of producing enough volume to sustain sales. They have no choice but to relegate the highest binning parts to these low power modes. They still have no parts that clock high enough in frequency to be performance competitive and still hit low power in the highest frequency mode.

Re: Now stop grant power for MA64 2700+ is at most 4.5W at min Pstate frequency and 15.4W at max Pstate although with C&Q, I do not conceive of a time when this occurs since I think that first the freq goes to min, the Vcc to min and then the CPU is halted. For Banias 1.5-1.7 this is 17.3W.

I don't know where you get either of these figures. The AMD spec lists 2.2W for IO power alone. For the Intel equivalent, you can use the Icc,max in stop grant mode, which is 8.6A, and then use table 6 to find the Vcc (which is the same that AMD uses, according to note 1 in their spec). Vcc at 8.3A is 1.459V, which is close enough for a close approximation. 8.3*1.459 = 12.1W of power. So how do you get 17.3W??

Re: Sleep mode is 3.4W for 2700+ (5W for all MA64) and 17.0W for 1.5-1.7. Deeper sleep is 0.16W for all MA64s and 1.35W for all Banias.

I still don't know where you get these figures for Athlon 64 (please show link), but for Banias, you get use the figures in tables 5, 6, and 7. For sleep mode, Icc,max is 8.4A. Most likely, the processor will be in Low Frequency Mode when in sleep mode, which would put the current at 6.8A and voltage at 0.936V, or 6.36W. I come up with the same deeper sleep figures, but you can not compare these to AMD's spec sheet, which only lists IO power.

Re: Since AMD's numbers include all external sources and the DRAM bus, Banias should include power sourced into the FSB and the DRAM bus(es) on the NB.

I am not arguing on the level of system power. Sure, the memory controller dissipates power on the northbridge, but that does not get counted as CPU power. When designing a small enclosure, it would be ideal if you could split up CPU power into multiple small sources at various locations on the mainboard. Two chips at 30W are of course easier to cool than one at 60W. So as far as this comparison, you can't add power of the northbridge as power than a Pentium M can dissipate.

Re: Still it is apparent that Banias 1.5-1.7 uses more power at all points than MA64 2700+ especially the low power points.

Not using your arguments. Half those numbers seem like they were made up out of thin air.

Re: And it shows that the 130nm SOI peocess (or A64 design) leaks less than Intel's 130nm bulk process.

Nothing at these levels suggest anything about leakage. To those of us who have spent time designing integrated circuits, this is obviously more evident than it is to you.