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Wouter Tinus

01/17/08 3:53 AM

#84558 RE: wbmw #84555

I'm no expert on the tech, but the press release definitely states that the latest generation of ZRAM can be implemented in SOI processes:

http://www.innovativesilicon.com/en/pdf/IEDM_PR_final.pdf (Dec. 12, 2007)

Z-RAM, like other floating body memories, uses a single SOI (silicon-on-insulator) transistor as the memory bitcell.

Z-RAM bitcell utilizes not only the MOS transistor, as is the commonly accepted practice, but also the intrinsic bipolar transistor which is present in all SOI MOS structures.

Additionally, Z-RAM is ideal for fully depleted (FD) SOI

j3pflynn

01/17/08 6:50 AM

#84559 RE: wbmw #84555

wbmw - Did you read the story I linked?

"...The Z-RAM is built in a PD SOI technology, and the Gen2 approach is compatible with either PD or fully depleted (FD) SOI. It requires no additional processing steps, and can be tuned to perform for speed or density, Okhonin said. It also has been demonstrated to work in the multi-gate finFET devices.

Advanced Micro Devices Inc. (AMD, Sunnyvale, Calif.) was ISI’s first licensee, with an announced goal of using it in a logic technology to form L3 cache on AMD’s microprocessors. AMD also took a license for the Gen2 technology...{/i}