Replies to post #206235 on Zeev's Turnips Patch-No Politics (ZEEV)

[Train Guy]

Intel can't totally kill Itanium. They have to try and save a little face. They bet a good bit of the farm on a new unproven concept and it turned out to be a dud. And being Intel, they won't be totally compatible with AMD. The software makers will have to continue supporting two similar standards like the do now with MMX and 3DNow.

It looks like somebody at Intel is starting to come to their senses. Since they aren't in the dram memory business, they don't much care what the standard is as long as there is cheap fast memory that can keep up with their CPU's. Having the next standard get tied up in the courts and royalty problems wasn't going to do them any good. Rambus may win in the courts, while losing in the market place. Obsolete before it even gets off the drawing boards.

And no need to worry about CPU prices going up any time soon. Supply will stay way above demand. How many people need 3 ghz to do a little word processing and web surfing?

[Train Guy]

A teraflop be enough for you? The current stuff is already starting to get ahead of what people need, let alone what is coming down the road in a few years.

-- "To maintain performance growth with stunted per-core and per-thread performance growth rates, we must have a more rapid increase in the number of cores per die," said Donofrio. This places unprecedented requirements on the corresponding growth of "off-chip" bandwidth. Donofrio said that off-chip signaling frequencies are likely to exceed the frequency of processor cores in the not-too-distant future. "By increasing the number of cores, I'm convinced that a one-Teraflop multiprocessor die with one-Terabyte of "off-chip" bandwidth is feasible — at reasonable cost — before the end of this decade. (snip)

He cited developments from IBM Labs to support his case. Scientists at the Almaden Research Lab in San Jose have constructed the world's smallest working computer circuits (12 by 17 nm) by deploying carbon monoxide molecules on an atomic copper surface arranged, more or less, as a sequence of toppling dominoes. "The technique, called molecular cascade, explores the far reaches of science to find ways to harness the quirky behavior of atoms, molecules and quantum spins as alternatives to silicon."

Using this technique, scientists were able to build a typical six-transistor SRAM cell in 90 nanometer technology occupying a square micron and working digital-logic elements about 260-thousand-times smaller than those used in today's most advanced semiconductor chips.

http://www.eet.com/semi/news/OEG20040216S0007