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kpf

05/27/07 5:01 PM

#43195 RE: wbmw #43193

It's just too bad that no semis are researching techniques that are viable in terms of cost and manufacturability.

All do. Howvever first you look for what works, and from what works you look what can be brought to manufacturability.

Metal gates work, and deliver benefits. But this does not come for free. It is the reason Intel added one fab from its plan of three 45nm fabs last year to four.

K.
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alan81

05/27/07 5:02 PM

#43196 RE: wbmw #43193

Regarding diminishing returns with process shrinks.
I don't think many have put together this trend with the fact that the gate oxide thickness stopped shrinking at about the same time this trend showed up:-)
I think most underestimate the importance of moving to high K dielectrics. The main question right now is what is the penalty Intel is paying to use it. That penalty can be in the form of cost, yield, and/or reduced characteristics in other areas. I am sure we will get a load of information on this as we move forward. IMHO the important point here is that the scaling train is back on the track and we should expect 32nm performance to be significantly better than 45nm...
--Alan