Replies to post #14917 on Advanced Micro Devices Inc (AMD)

[sgolds]

blauboad, recall the 8088 processor. It had the internal 16-bit design of an 8086, but had an 8-bit pinout (and required two fetches for 16-bit data instructions).

Intel can put in true 64-bit internals in Prescott in the existing socket by implementing a similar scheme. The path from cache to CPU would be fully 64-bit, also; any 64-bit data fetches to main memory could be sequential 32-bit accesses (done by the cache line logic, in blocks anyhow). Address can be 36-bit (64GB), similar to PAE, by using the lower 36-bits of the internal 64-bit address registers.

The A64-FX and Opteron would have better data flow than such a design from Intel, but it would compete well with the socket 754 A64. This design could run the entire AMD64 instruction set internally.

I'm not saying all this will come to pass, just pointing out something that is feasible.

[wmbz]

Oops, I did mean Tejas. What would the point be for instructions that are not Windows64 compatible? Unless they are marketed as extensions like SSE/SSE2 for which the developers of apps have specifically optimize for. Wasn't that the trends for x87? Instead of makinf x87 code run faster just rewrite it as SSE2. Maybe they are trying to move all the x86 code base to this new ISA piece meal. First they took care of the x87 now they will do the rest. 2-3 years down the road they won't even have to maintain x86 compatibility.


C