Wasn't me!
By the way: A Rome carrier shot has been shown by Lisa Su. It really uses 8 8-core 7nm dies together with a (huge) interconnect. That is, again, a pretty unexpected/unorthodox design. AMD is really thinking out of the box. The interconnect die, which is huge, is rumored to still be a 14nm design. This may be to use the high performance, but still expensive, 7nm process only for the parts where it matters most - the CPU cores, and leave the rest of the peripherals on a cheaper and lower performance process. Smart move it seems. It makes me wonder how AMD can reuse those 7nm dies for other designs, though. I expect those 7nm chiplets to always need an interconnect die of some sort, which likely leaves 7nm to the highest end many core designs. Maybe some more lower bin EPYCs and Threadrippers, but no Ryzen 3/5/7, I would expect.
Could be that AMD will wait at least a year or two for mainstream designs in 7nm. We'll see about that.
Performance wise, Rome is beating a high end dual socket Intel server platform in a rendering application. It was also compared to a EPYC 1 dual socket system, where Rome also came in first (with the same overall core count). That looks like a compute beast indeed.
Intel will be reacting with a 48 core, dual chip(let) CPU by mid of next year. Total cost of ownership will be crucial here, taking into account power consumption. Will be interesting how Rome on 7nm does there compared to Intel.
Different story: Just today I was told that Intel is offering wafer slots for foundry business in 22nm Finfet. Those slots are pretty large, though, so a customer needs quite some volume to get in. Still interesting that, slowly and quietly, Intel seems to get into the foundry business. Took them quite a while, but I would see this as positive for Intel.
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