Replies to post #147523 on Intel Corp (INTC)

[This Causes an Error]

The Linley analysis is incorrect. The analysis works for TSMC 10nm, but misses that TSMC is getting another sizable density improvement in going from 10nm to 7nm (or, put another way, the scaling from 16FF+ to 7nm is much greater than 2x).

This can be verified with public statements from TSMC/Intel. Intel's HD SRAM cell measures in at around 0.0499um^2. TSMC's HD SRAM on 16FF+ measures in at 0.07um^2.

TSMC reported that its HD SRAM cell on 7nm is 0.027um^2.

It is entirely wrong to say TSMC 7nm is roughly as dense as Intel 14nm. TSMC 7nm is significantly ahead of Intel 14nm in terms of transistor density (just look at the reported SRAM cell sizes) and should be in the ballpark Intel gets at 10nm.

If Intel achieves a 50% SRAM shrink from its 14nm with 10nm, it will not be a full generation ahead of TSMC as the Linley analysis implies.