Replies to post #143278 on Intel Corp (INTC)

[mmoy]

I was considering getting an iPad Mini 4 to use as a hotspot or from mobile browsing in general. The advantages of using an iPad for a hotspot are: battery life (good for 20 hours I think) and you aren't limited to one carrier which is typical for hotspots. iPads support all four major carriers. The built-in Apple SIM will work with AT&T, Sprint and T-Mobile. If you want Verizon, you need a free Verizon SIM and have to put it in the slot.

This may be useful if you travel to areas where there are only one or two carriers with service. One of the places I was at this year had good Sprint coverage, okay T-Mobile coverage and barely any Verizon coverage (surprising to me) and no AT&T coverage.

[Andy Grave]

...from neolib on SI.....can someone rationalize this??

Last word on the Altera roadmap had “Cedar” (replacing Cyclone) fabricated using TSMC 16nm (due to "cost/power" reasons) to be delivered 1H 2016. “Oak” is Intel 14nm and is due in 2H 2016. “Sequoia” is Intel 10nm due sometime in 2018.

The Twists and Turns of Xilinx vs Altera!
by Daniel Nenni
Published on 12-08-2015 11:00 AM
2 Comments Comments
Article: Fast SPICE from Kiev at DAC-xilinx-zynq-ultrascale-min-jpgThe battle between Xilinx and Altera continues to be one of the more interesting stories to cover. It really is the semiconductor version of a reality TV show. In the beginning it was two fabless companies partnered with rival foundries going head-to-head controlling a single market that touches a variety of industries.

Then things got interesting when Xilinx left UMC to share TSMC with Altera taking the foundry differences out of the equation. Next Altera left TSMC for Intel? Say what!?!?! Then Altera did a head fake back to TSMC and Intel bought them for a 56% premium! Now that process differences are back in the equation let’s take another look.

In the beginning FPGA vendors had very close relationships with the foundries. FPGAs were used during process development and ramping due to their dense design blocks that are used repeatedly throughout the chip. It was a very intimate partnership, one that made FPGAs bleeding edge chips at the process level. That all changed of course at 28nm when Xilinx joined Altera at TSMC which brought a level playing field where design and implementation was key.

It is well documented that the first FPGA vendor to a new process node is awarded majority market share. Even Intel CEO Brian Karazchi recently called it out as one of the three reasons why Intel bought Altera during a fireside chat with John Pitzer of Credit Suisse:

“there is strong data that suggests that the percentage -- the company that’s had leadership position, first products on the first node, you have to have the right design, right architectural point and all, but they’ve tended to gain share.”

For the record, Xilinx won the 28nm battle by out-implementing Altera at TSMC 28nm and again at TSMC 20nm. Altera moving to Intel Custom Foundry made the race to FinFET interesting but Xilinx again won that one. In fact, I have yet to see Altera/Intel 14nm silicon while Xilinx started shipping FinFET parts at the end of Q3 2015. Last word on the Altera roadmap had “Cedar” (replacing Cyclone) fabricated using TSMC 16nm (due to "cost/power" reasons) to be delivered 1H 2016. “Oak” is Intel 14nm and is due in 2H 2016. “Sequoia” is Intel 10nm due sometime in 2018.

The good news is that technically Altera will win the 10nm process node race since Xilinx is skipping 10nm in favor of an accelerated 7nm process. The bad news is that TSMC 7nm will be in production at about the same time as Intel 10nm so it will be a hollow win.

It is too soon to tell if the Intel process is favorable to FPGAs, 14nm will tell us that next year. I highly doubt Intel will use Altera FPGAs to ramp their 10nm process so it really is a coin toss. Even so, it may not be enough advantage over Xilinx/TSMC if they are a process node ahead. Remember, I'm not a journalist reporting the news here, this is the opinion, observation, and experience of a 30+ year fabless semiconductor professional who also likes to write.