Replies to post #142939 on Intel Corp (INTC)

[This Causes an Error]

Skylake does not have SHA acceleration. These instructions will be first introduced in Goldmont and will then be brought to Core at a later date. I think the intercept point will be CNL although there is a possibility that it will come in SKX first.

[Dmcq]

A9X hangs with Core-M in GB3

If you discount all the talk about heat pipes and cooling and fans for the fastest ones for the Core-M at

http://anandtech.com/print/9117/analyzing-intel-core-m-performance