Replies to post #9880 on Rambus (RMBS)

[lolo]

Regarding Clock 'coupled to' output driver

Cal, your comments on the WorldWideWait
were
'coupled to'

a thought I had when i read the note;

A question for 'their' expert;

How many nanoseconds before the memory data is asserted
(onto the memory data bus by the outputdriver circuit)
does the relevant clock edge occur?

I think it will be a very finite number of nanoseconds...
If their expert says I don't know or didn't do the analysis,
then it is another huge openning to explore his 'expertise',
as if anymore huge holes in his credibility were needed.

Here's another idea, for guys like us in the interim;
Just as Docrew has grounded a vast amount of wild speculation with his linked lists of docket entries,
perhaps we could have done nearly-equivalently valuable work
to post and dissect relevant data sheets from offending vendors,
with our uniquely incisive analytical comments...

OK, at some point I will be able to make my points without the shields of indirection.

Hmmm, I realize the conspicuous flaws with this suggestion;
I'm just looking for something more fun to do with all my white-knuckle anxiety, more fun than parsing USPTO guidance documents...
LOLo