Replies to post #26096 on Intel Corp (INTC)

[chipguy]

Remember 17GB/s for Cloverton includes Cloverton to Cloverton traffic

Ever heard of a coherency snoop filter?

[tecate]

If you are refering to the same desktop comparison as I think you are (Conroe vs FX60 at IDF) that comparison was completely designed to give Intel an advantage as well.


Just because AMD does this does NOT mean that Intel does. You should be embarrassed to be such a droid. Do you actually think Intel is going to have Anandtech and others do a slanted test? It would take YEARS for Intel to regain the trust of these sites.

[wbmw]

Re: Remember 17GB/s for Cloverton includes Cloverton to Cloverton traffic as well

There will be socket to socket traffic in a Clovertown system, but don't forget that Opteron's remote memory will also be burdened by chip to chip traffic.

Re: plus QC might see higher frequency HTT than currently available

Go ahead and assume zero latency for HTT. It has very little to do with the memory subsystem anyway, except for being on the path to remote memory, but the HTT contributor for this has always been small to begin with.

Re: FBDIMM adds latency as well.

And features such as simultaneous read/write should mostly make up for that.

Re: The fact that Intel needs a NB adds latency compared to AMD's solution as well.

Except you're forgetting that there's more to performance than low latency. Core's caches and prefetchers should minimize the latency impact in server loads just as much as they do with desktop loads.