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05/18/03 11:21 PM

#4802 RE: Dan3 #4705

"Opteron's fabulousness isn't primarily due to having 64-bit registers. It's due to the integration of the chipset's crossbar switches and memory controllers with the CPU on one piece of silicon.
Just as the on-die cache has proven to be a huge benefit in improving performance and lowering costs, so does on-die chipset boost performance and lower costs."

So how does all this Opteron fabulousness result in a herculean 193 sq. mm. die size, 2 extra metal layers, 8 extra masking layers, an extremely expensive SOI process that results in 18% yields and sub 2 GHz clcok speeds and produce "improving performance and lowering costs," ?

Come on - riddle me this one?

-SZ