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Saturday, 03/29/2014 4:02:12 PM

Saturday, March 29, 2014 4:02:12 PM

Post# of 151686
Intel at 2014 VLSI Symposium Circuits

most interesting:
- A 2GHz-to-7.5GHz Quadrature Clock Generator Using Digital Delay Locked Loops for Multi-Standard I/Os in 14nm CMOS.

- 2nd Generation Embedded DRAM with 4X Lower Self Refresh Power in 22nm Tri-Gate CMOS Technology.


http://www.vlsisymposium.org/wp-content/uploads/2013/06/Circ-14-program.pdf
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