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Re: gollem post# 69940

Thursday, 01/19/2006 8:15:49 PM

Thursday, January 19, 2006 8:15:49 PM

Post# of 97871
"so the potential for condiderable improvement is there, we'll have to see if it pans out."

I suspect that this is intended for the future L3 cache. They are bragging about switching speed of less than 3ns. And ~330 MHz isn't going to cut it for L1 or L2.
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