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Re: deeba post# 10978

Thursday, 04/17/2003 3:11:38 PM

Thursday, April 17, 2003 3:11:38 PM

Post# of 78730
deeba - The highlighted text in your message, With our chip, a 500-meter binder of 50 pairs could carry 5 Gbps total capacity symmetrically and reliably, has been read, reread and thought about me for weeks now.

My original thought was that the reference was that the product was capable of 50Mbps each way symmetrically based on the statement. Another poster however felt that it indeed was 100Mbps.

I'm changing my tune, I stand corrected. The President's Letter has given us a huge clue relating to product capabilities that by reason is a result of continued prototype testing.

The product apparently will push 100Mbps in each direction on a pair of wires (symmetric) and thus the notation of 50 pairs could carry 5 Gbps (50 pair X 100Mbps per pair) symmetrically.

More information will be great and can't come soon enough. The only other references to speeds in excess of 100Mbps were by ST and Infineon who were adding up both sides of the wire to get to 100Mbps! And one can not parse the wording used - it is presented as a point of fact in the Presidents Letter.

Your mileage may vary but this is very interesting.



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