Advanced Micro Devices Inc (AMD)

[chipguy]

Then, 1 IPC seems wrong, I think Athlon has something like 3.5 IPC.

No, the 1 IPC is approximately correct although it will vary a lot from code to code.
Also keep in mind that with a modern (decoupled execution) x86 processor there
are actually two IPC figures for a given program run (trace). The first is the native
IPC - the average number of x86 instructions executed and retired per clock cycle.
This averages 0.8 to 1.0 or so in a PIII or K7 class processor. The second is the
uop IPC - the average number of micro-operations executed and retired per cycle.
This number is typically 1.3 to 1.5 times higher than the native IPC.

The only processors that have achieved 3.5 IPC or more on a non-trivial set
of large scale applications are the Alpha EV68 and the Itanium 2, both of which
are six wide issue CPUs matched to tremendous cache and memory systems.
The 3.5 IPC level is achieved on FP codes. With pure integer code IPC is closer
to 2.0 to 2.5.