Advanced Micro Devices Inc (AMD)

[UpNDown]

chipguy, Not a Short, on 2.4MHz

Yes, it's an old slide -- October 2002, I believe. The changes we expect to see on April 22 are in clock speeds, with 1.4GHz, 1.6GHz and possibly 1.8GHz expected. In September we'll see whether we get 400 MHz DDR with Athlon-64.

I believe the model numbering is as so:
1xx - uniprocessor (but not Athlon-64, for marketing reasons). May not see these.
2xx - dual processor -- number of aHT/cHT links up in air
4xx - 4P, although what the difference is between 4P and 8P is, who knows? Perhaps hard-coded crossbar logic?

x1x = 256KB cache (note: inclusive, not exclusive like Athlon)
x2x = 512KB cache
x4x = 1MB cache
further cache increments would be 1/2 or 1 MB.

xx0 = 1.4 GHz
xx1 = 1.6 GHz
xx2 = 1.8 GHz, etc.
further speed increments would be .2 GHz (the base clock)

I'm interested in the coherent HyperTransport timings. It seems to me that in K8 AMD has used the aHT -- the standardized HT machinery -- to implement cHT, which (if there is any interest in this thread) I'll call cHT1 (one). But cHT is proprietary, and I think AMD could throw more transistors at the crossbar logic to get a faster cHT2 for K9.

I'm not interested in a flame-fest here, but would anyone else be interested in such a discussion?