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Re: DewDiligence post# 1595

Saturday, 03/29/2003 9:35:31 PM

Saturday, March 29, 2003 9:35:31 PM

Post# of 97554
Dew -

are you suggesting that moving to a SOI-based design could have the effect of slowing down the achievable clock speed? If so, I do not understand what you are driving at. T.i.a. Dew

I'm giving you information.

3 years ago Intel integrated a P3 core, a graphics controller and a rambus memory controller hub. They did it on their hvm fab process and they were able to maintain the full core frequency. They suffered no drop in speed.

AMD has added 2 pipeline stages to the Athlon core, moved it to a "more advanced" SOI process while adding a memory controller and aHT ports, roughly equivilent to Intel's Timna chip in added complexity. One would expect Opteron to gain speed from the additional pipeline stages and gain speed from the "more advanced" SOI process, yet all indications are that Opteron will lose substantial clock speed. It has been suggested here that 64 bitness degrades frequency but the person who made that claim did not offer a convincing case. If anything I would expect Opteron to run at higher frequencies than it's shorter pipeline, bulk silicon cousin but it looks like exactly the opposite takes place. If SOI is truly "more advanced" one might wonder why are frequencies going down?


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