Rambus (RMBS)

[calbiker]

Re. Why TR Labs complaint fails

There has never been an RDRAM technology that uses the clocking scheme described in either U.S. Patent 5,243,703 by Farmwald & Horowitz, or U.S. Patent 5,361,277 by Grove.

Simply put, real RDRAMs don’t work that way.

LOL, I would call this a lousy post. He states RDRAM don't work that way but fails to mention the most important item: REASON. Without giving a reason, the post is next to worthless.

As far as I know, RDRAM has one clock generator that's located on one end of a row of RDRAM devices. This is the 'early clock'. This signal goes to every RDRAM device and finally to the memory controller where the signal (clock) loops around and goes back to each RDRAM device again. This signal is called the 'late clock'. This architecture is described in the Grover patent as well as the Rambus '703 patent.

It's impossible to read the guy's mind. He'll have to provide more info if he wants to be taken seriously.


Edit: Now I get it, the Grover patent doesn't have a triple multiplexed bus.