Rambus (RMBS)

[smd1234]

infringeon - round 2:
The Verdict on HPQ and Grover Patents
by: infringeon2003 11/18/05 11:27 am
Msg: 826463 of 826741

The verdict on the HPQ patent has already been determined by the US Patent Office.

The Verdict on the Grover patent is that RAMBUS does not infringe. The Grover patent is much more complex than the RAMBUS patent.
Grover is a "closed loop" control timing control system while Rambus is an "open loop" timing control system.

Grover was intended to be used in telecommunication applications where the clock signal is a radio wave or someother part of the electromagnetic spectrum not an electricla signal on a copper trace. Grover would be useful for synchronizing groundsation to satellites. RAMBUS would be useless for that purpose.

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Is that why Grover was not cited as prior art?
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Re: The Verdict on HPQ and Grover Patent
by: infringeon2003 11/18/05 11:51 am
Msg: 826497 of 826741

Probably!

Also the '703 patent issued before the Grover patent which was tied up in intereference proceddings with the Hewlett Packard patent.

The Grover patentwas addressing mainly the "telecommunications" arena not the memory system design area. So they were in different patent categories.

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If one diagrammed the two leaving off the feedback loop and not mentioning the physical tuning of the traces, the diagrams might appear very similar? Will Payne understand this?
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Re: The Verdict on HPQ and Grover Patent
by: infringeon2003 11/18/05 11:44 am
Msg: 826490 of 826741

I don't think that Payne is into the "understanding" thing.

The clock circuit diagram for Rambus does not show that it attaches back to the source of the master clock. It is an "Open Loop" control system.

The Grover Patent digram shows that the return clock signal attaches back to the source of the master clock.

This is a HUGE DIFFERENCE from an engineering and manufacturing point of view!

Re: The Verdict on HPQ and Grover Patent
by: infringeon2003 11/18/05 11:46 am
Msg: 826492 of 826741

The Rambus "open loop" control system design
leads to the use of "latency registers" on the memory components attached to the RAMBUS bus.