Advanced Micro Devices Inc (AMD)

[pgerassi]

Wbmw:

Intel's system organization where everything is copied locally and inter core communication goes through the chipset (Centrallization). Intel assumes that the chipset is the place for stuff. AMD takes a distributed approach.

Yes you could do it with FSBs and get the same result. But it is more difficult to do it with a star topology than with a multidimensional fabric. It also is incompatible with Intel's one controls (Me first) policy. But very compatible with AMD's sharing (Us together) policy. Going against the grain is always difficult and rarely thought of.

As to the distributed L3, if you can't find it locally, your hope that its in the local cache is dashed anyway. Would you rather go through the long latency to main memory or would you rather it be in a neighbor's cache where you could get it quicker? You have to check that the memory address is controlled remotely anyway. Even Intel. But the latency of that is nearly as much as that of memory. If it is controlled by another core, the memory access must be flushed. On Intel's high latency memory and interCPU comm, the result is quite bad. AMD's low latency memory and very low latency interCPU comm, this works much better.

As to where FAC are used: http://www.stanford.edu/~huanliu/globecom02.pdf

There are many others. Just use your favorite search engine like www.google.com to see them.

Pete