AI
Thursday, July 28, 2005 9:57:00 AM
louis: Re: Spokeshave, I would like your comments on the SEC filing.
Well, since you asked...
Unfortunately, there is not really very much in the way of information - at least new information - in the presentation. I will say that the company has definitely improved its PowerPoint skills. Maybe that's why the marketing hire.
Anyway, I do have some thoughts. I will try to be as prospective as possible, since iamshazzzam has developed such an acute allergy to history. Let's start with this chart:
There are some glaring omissions from this chart - namely, ADSL2, ADLS2+ and VDSL2. I am not sure why the company chose to omit the fastest xDSL technologies and standards from this chart for comparison. However, one could speculate that it makes Embarq look much better if they don't include the fastest available technology in the comparison.
In particular, VDSL2 is a recently ratified standard (as was ADSL2+) that provides 200Mbps total bandwidth at 350 meters (1150 feet). This is significantly greater than the 90 or so Mbps throughput that Embarq claims at the same distance. I have not yet been able to find the distance figures for VDSL2 beyond the 350 meters in the standard. However, as I have shown in the past, there are products that significantly exceed the claims of Embarq over short ranges, are comparable over the middle ranges, and exceed Embarq's claims over long distances. Ikanos, Metalink, Centillium and Infineon all have VDSL2 chipsets on the market.
In short, it seems that NVEI is making its claims of having a market advantage without considering the latest market developments. Clearly, the latest market developments do not appear in its comparison charts.
Additionally, if you look at this chart:
You see that, once again, the fastest available technologies (ADSL2+ and VDSL2) are conspicuously absent. Both standards (ADSL2+ and VDSL2) far exceed the so-called "bandwidth required by digital home". Depending on how you split up the throughput (upstream and downstream) the existing standards compare to, or exceed the Embarq claims.
As a side note, I think it is obvious that Chen did not review these slides (would you not notice that they spelled your name wrong?):
I suppose some folks will probably ask why they now refer to the ASIC as an ASSP. They are both simply generic terms for virtually the same thing.
Regarding the timelines, they seem to be projecting that the FPGA will be completed by the end of the year. I suppose I will take this one opportunity to be retrospective (sorry iam). This is, I believe, the fourth time that the company has scheduled the delivery of the FPGA by the end of the year. Don't hold your breath.
They also seem to be claiming that they can get the ASSP completed by March 06. I frankly think this is ridiculous. Before even beginning work on an ASSP, the FPGA has to be tested both in-house and by potential customers. That alone would take months. Additionally, initial engineering of an ASSP will take several weeks under the very best circumstnaces. Finally, it takes 6 to 8 weeks to go from raw silicon to a finished chip. This timeframe is driven by the laws of physics. In short, 3 months to go from FPGA to finished ASSP is ridiculous, IMO.
Regarding HelloSoft, the presentation has a statement that Phase 1 is complete, and phase II began this month. I am not sure what phase I was, but considering that we do not yet have an FPGA, I think it is safe to conclude that phase I did not include completing the FPGA, as many here speculated.
Another thing that is conspicuously absent is the amount of money needed to produce an ASSP. This is not addressed at all by the presentation that I can tell.
Anyway, those are my thoughts. There is really nothing new in the presentation except the new amount being given to HelloSoft and the timelines for the FPGA and ASSP, which I find to be completely unrealistic.
Well, since you asked...
Unfortunately, there is not really very much in the way of information - at least new information - in the presentation. I will say that the company has definitely improved its PowerPoint skills. Maybe that's why the marketing hire.
Anyway, I do have some thoughts. I will try to be as prospective as possible, since iamshazzzam has developed such an acute allergy to history. Let's start with this chart:
There are some glaring omissions from this chart - namely, ADSL2, ADLS2+ and VDSL2. I am not sure why the company chose to omit the fastest xDSL technologies and standards from this chart for comparison. However, one could speculate that it makes Embarq look much better if they don't include the fastest available technology in the comparison.
In particular, VDSL2 is a recently ratified standard (as was ADSL2+) that provides 200Mbps total bandwidth at 350 meters (1150 feet). This is significantly greater than the 90 or so Mbps throughput that Embarq claims at the same distance. I have not yet been able to find the distance figures for VDSL2 beyond the 350 meters in the standard. However, as I have shown in the past, there are products that significantly exceed the claims of Embarq over short ranges, are comparable over the middle ranges, and exceed Embarq's claims over long distances. Ikanos, Metalink, Centillium and Infineon all have VDSL2 chipsets on the market.
In short, it seems that NVEI is making its claims of having a market advantage without considering the latest market developments. Clearly, the latest market developments do not appear in its comparison charts.
Additionally, if you look at this chart:
You see that, once again, the fastest available technologies (ADSL2+ and VDSL2) are conspicuously absent. Both standards (ADSL2+ and VDSL2) far exceed the so-called "bandwidth required by digital home". Depending on how you split up the throughput (upstream and downstream) the existing standards compare to, or exceed the Embarq claims.
As a side note, I think it is obvious that Chen did not review these slides (would you not notice that they spelled your name wrong?):
I suppose some folks will probably ask why they now refer to the ASIC as an ASSP. They are both simply generic terms for virtually the same thing.
Regarding the timelines, they seem to be projecting that the FPGA will be completed by the end of the year. I suppose I will take this one opportunity to be retrospective (sorry iam). This is, I believe, the fourth time that the company has scheduled the delivery of the FPGA by the end of the year. Don't hold your breath.
They also seem to be claiming that they can get the ASSP completed by March 06. I frankly think this is ridiculous. Before even beginning work on an ASSP, the FPGA has to be tested both in-house and by potential customers. That alone would take months. Additionally, initial engineering of an ASSP will take several weeks under the very best circumstnaces. Finally, it takes 6 to 8 weeks to go from raw silicon to a finished chip. This timeframe is driven by the laws of physics. In short, 3 months to go from FPGA to finished ASSP is ridiculous, IMO.
Regarding HelloSoft, the presentation has a statement that Phase 1 is complete, and phase II began this month. I am not sure what phase I was, but considering that we do not yet have an FPGA, I think it is safe to conclude that phase I did not include completing the FPGA, as many here speculated.
Another thing that is conspicuously absent is the amount of money needed to produce an ASSP. This is not addressed at all by the presentation that I can tell.
Anyway, those are my thoughts. There is really nothing new in the presentation except the new amount being given to HelloSoft and the timelines for the FPGA and ASSP, which I find to be completely unrealistic.
Join the InvestorsHub Community
Register for free to join our community of investors and share your ideas. You will also get access to streaming quotes, interactive charts, trades, portfolio, live options flow and more tools.
