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Re: chipguy post# 60024

Tuesday, 07/26/2005 9:44:09 AM

Tuesday, July 26, 2005 9:44:09 AM

Post# of 97636
You mean the same 90 nm bulk CMOS process that it produces
the 2.26 GHz, 1.36 V, 27W Dothan in? Explain to me why IBM
and AMD go through all the pain and expense of PD SOI when
it apparently provides nothing tangible but slow ramps and, in
IBM's case at least, acknowledged yield problems?


Me...

I keep hearing that SOI costs too much(from the INTC guys), but in the big picture the added cost looks piddly compared to the advantages that seem to be coming from the move. I know INTC has tested it and determined that it adds nothing to bulk CMOS, but clearly something has changed since AMD went with the process. Compared to the increases in top end chips and added ASPs were seeing from AMD the minor added costs of SOI and DSL seem well worth the price. All I can do is look at things from a relatively high point of view, and from where I'm sitting something is working, and it looks like it's SOI.
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