IBM, Intel And Synopsys Announce Mobile Electronic Design Automation Technology Initiative For Design Engineers
ANAHEIM, Calif., June 13, 2005 – IBM, Intel Corporation and Synopsys Inc. today announced a “mobile-aware” technology initiative to bring mobile design tools to the electronic design automation (EDA) market segment, aimed at increasing the productivity and flexibility of design engineers.
Synopsys is showcasing its Discovery™ AMS solution, with NanoSim® and VCS® technology, on a mobile PC platform at Intel’s booth (# 2291) at this year’s Design Automation Conference (DAC). IBM is also showing its Integrated Electronic Design Environment Methodology Guide and Virtual Desktop on the mobile platform at the same booth. The new platform combines the strengths of Intel® Centrino™ mobile technology, IBM ThinkPad notebooks and Synopsys and IBM EDA solutions.
As part of the initiative, this year Synopsys will engage in technology and market assessment of “mobile-aware” design applications with selected customers and with support from Intel and IBM. Following a successful assessment phase, Synopsys will introduce mobile-aware EDA applications for Intel Centrino mobile technology-based platforms.
“We’re continually investigating new technologies to give our customers the EDA products and support they need for complex silicon design,” said Raul Camposano, chief technical officer at Synopsys. “By developing applications that utilize the strengths of Intel Centrino mobile technology and IBM’s ThinkPad notebooks, Synopsys is embracing the latest technological advances in order to enhance the productivity of our customers.”
“With mobile-aware EDA applications, engineers will be able to design and collaborate virtually anywhere while away from their offices,” said Guru Bhatia, IT engineering computing director, Intel Corporation. “Intel developers are currently using Intel Centrino mobile technology-based platforms for engineering and product development. An Intel pilot study shows more than a 10 percent productivity increase for design engineers on Intel Centrino mobile technology-based workstations in connected mode alone, and estimates higher productivity with connected and unconnected modes when all EDA applications are made mobile aware.”
“As engineers face intense time-to-market pressure, battle to hold development costs within budget, and still optimize their products’ functionality, they need a radical change in the way they manage the design chain, especially in the realm of nanometer design,” said Dale Hoffman, director of business development and chief technical officer, IBM’s Engineering Technology and Services division. “IBM will address these critical requirements through the deployment of solutions like the Mobile Engineering Workstation and our Integrated Electronic Design Environment (IEDE). We will demo our IBM IEDE Methodology Guide, which allows users to navigate the tools and best practices needed to design a chip, on a Synopsys Design Compiler flow at the Intel booth.”
Another significant milestone for CE-ATA at CES is the completion and distribution of a release candidate of the core protocol specification to CE-ATA members. The final 1.0 spec is on track to be ratified and published in the first half of this year as originally committed at the launch of the initiative. The first end products supporting the new technology could be available as early as late 2005.
More progress out of CES is Marvell Semiconductor's technology demonstration that illustrates key CE-ATA interface fundamentals. (Marvell's booth is located at South Hall, #35346.) Marvell's demo of a working prototype system signifies the rapid progress the organization is making toward delivering CE-ATA end products in the latter half of this year, according to Dr. Alan J. Armstrong, vice president of marketing for Marvell's Storage Division.
IBM IEDE supports mobile-aware computing technology by embracing the key components of a state-of-the-art design factory such as Synopsys’ leading-edge design tools and methodologies, assurance of best practices and policies, availability of design skills and services, on-demand IT infrastructure accessibility, and a solution-based suite.
In addition to its Discovery Verification solutions, Synopsys will demo its Design Compiler®, Formality®, PrimeTime® and VCS® products on IBM’s IEDE virtual desktop collaboration solution, as well as its Hercules™ and Proteus™ design for manufacturing solutions on 64-bit Intel® Xeon™ Processor-based compute platforms.
About IBM
IBM is the world’s largest information technology company, with 80 years of leadership in helping businesses innovate. Drawing on resources from across IBM and key IBM Business Partners, IBM offers a wide range of services, solutions and technologies that enable customers, large and small, to take full advantage of the new era of on-demand business. For more information about IBM, visit www.ibm.com.
About Synopsis
Synopsys Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at www.synopsys.com.
Intel, the world's largest chip maker, is also a leading manufacturer of computer, networking and communications products. Additional information about Intel is available at www.intel.com/pressroom.
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