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Thursday, 04/14/2005 9:24:30 PM

Thursday, April 14, 2005 9:24:30 PM

Post# of 151741
Intel may drop high-k gate dielectric

http://www.eet.com/news/semi/showArticle.jhtml?articleID=160900376
MUNICH, Germany — Intel Corp. may drop the use of a high-k dielectric in the transistor gate stack at the 45-nanometer manufacturing process node, according to Paolo Gargini, Intel Fellow and the company's director of technology strategy.
Gargini, added that the company is working on a second high-k material, with a yet higher dielectric constant, but emphasized that the company's process technologies beyond the 65-nm node are not fixed. He said engineers were being encouraged to find a different engineering solution to the use of high-k.

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