Rambus (RMBS)

[cordob]

Tom's Hardware link about Cell

http://www.tomshardware.com/hardnews/20050207_160318.html

snip:
The memory and memory interface for the chip is designed by Rambus and will be built around the firm's FlexIO processor bus interface and XDR memory. The aggregate processor bandwidth of the Cell processor is estimated to top 100 GByte per second. According to Rambus, FlexIO is capable of running up to 6.4 GHz data rates providing bandwidth more than four times faster than best-of-class processor buses available today. XDR data rates will clocked from 3.2 GHz to 8.0 GHz, Rambus said.


It has a picture of the chip (pretty large)

Cheers
Cor