Friday, September 20, 2002 9:54:31 AM
Re: "The postponed launch of the K8-core processors is indeed due to problems in the back-end verification of SOI technology and minor changes in processor design, Richard Heye,
vice president of platform engineering and infrastructure at Advanced Micro Devices (AMD), confirmed on September 20 during a visit to the company's partners in Taiwan."
Well SOI technology is a "front-end" issue, so it isn't that ... How about LowK/Copper integration ??!! That's a back-end issue !! Sounds like AMD is in a lot of trouble with the .13um Copper/LowK process. This was discussed and warned over on the SI thread ... Of course the AMDroids there
are very "blinkered". <ggg>
Make It So,
Yousef
--Suppose what he Meant by the statement of "Back End Verification", was "End Of Line Yield and Bin Splits are bad, due to the Front End SOI"? These Non-Process types get their statements from the Process Engineers, but somtimes it is difficult to get the correct picture through the heads of people who are not involved in the Process. That would make your statement true also..... Right? Still, not good, if there is an issue with SOI, it would affect most of the Front End Layers. Depending on what exactly is the problem, based on the need to delay, it doesn't seem like a small issue to me.
Maybe intel was telling the truth after all about the lack of benefit of Partially Depleated SOI. JMO
Semi
P.S. - What's an SI Thread, some New Process Defect??
vice president of platform engineering and infrastructure at Advanced Micro Devices (AMD), confirmed on September 20 during a visit to the company's partners in Taiwan."
Well SOI technology is a "front-end" issue, so it isn't that ... How about LowK/Copper integration ??!! That's a back-end issue !! Sounds like AMD is in a lot of trouble with the .13um Copper/LowK process. This was discussed and warned over on the SI thread ... Of course the AMDroids there
are very "blinkered". <ggg>
Make It So,
Yousef
--Suppose what he Meant by the statement of "Back End Verification", was "End Of Line Yield and Bin Splits are bad, due to the Front End SOI"? These Non-Process types get their statements from the Process Engineers, but somtimes it is difficult to get the correct picture through the heads of people who are not involved in the Process. That would make your statement true also..... Right? Still, not good, if there is an issue with SOI, it would affect most of the Front End Layers. Depending on what exactly is the problem, based on the need to delay, it doesn't seem like a small issue to me.
Maybe intel was telling the truth after all about the lack of benefit of Partially Depleated SOI. JMO
Semi
P.S. - What's an SI Thread, some New Process Defect??
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