Advanced Micro Devices Inc (AMD)

[KeithDust2000]

Fabless once more – An interview with SiS director Nelson Lee
Vyacheslav Sobolev [Thursday 16 December 2004]

Change and evolution are ongoing at Silicon Integrated Systems (SiS). Best known as a maker of highly integrated core-logic chipsets, last year SiS reverted to being a fabless IC design house, following a period when it had operated its own fab. This year SiS has emerged as one of the most significant supporters of the AMD K8 platform, but, nevertheless, still really has no option but to adhere to Intel’s licensing rules.

DigiTimes.com spoke with Nelson Lee, director of product marketing at SiS’s technical marketing department, about these and other factors in SiS’s ongoing participation in the “third-party” core-logic chipset market, in what is a key period of transition for PC architecture.


Q: Recently, some industry observers have declared that the main focus for Taiwan’s chipset vendors in the coming months will be AMD's K8 platform. Is this true or not in case of SiS?

A: Currently we ship chipsets for both the Intel P4 and the AMD K8 platforms, but chipsets for the P4 ship in much higher volumes. That means we are now putting a lot of focus on promoting K8 chipsets, to increase their sales. It also means we'd like to occupy a larger market share with our solutions for K8 platform.

Q: The AMD64 processor platform still doesn’t have a large market share. Do you really see a lot of opportunity there?

A: Actually, the market for chipsets for the AMD platform is less competitive than the P4 chipset market. There is no promotional program similar to the “Intel Inside” campaign for the AMD platform, so for us it's much easier to compete in the AMD market by offering a full portfolio of solutions, from the low-end to the high-end segments.

Q: Designing chipsets for K8 platform would appear to be easier because there is no need to incorporate a memory controller in the northbridge since it's integrated in the processor itself. Does that mean the role of the chipset itself and the chipset maker comes to be less important when we talk about the AMD platform?

A: No, it doesn't. Moreover, I believe we have more experience than AMD in designing memory controllers. Actually, we'd like to see AMD stop putting the memory controller in the CPU. I approached AMD about this several times, but they have their own reasons for integrating the memory controller with the CPU.

Q: How’s about chipsets for the mobile K8 platform? Do you see any chance for SiS to see success there?

A: We're already successful in this market. So far some major notebook vendors, like NEC, Fujitsu-Siemens, eMachines and so on, use our SiSM760 integrated chipsets for their products based on Mobile Athlon 64 processors. The market for the mobile K8 platform isn't a large one, yet, but it's certainly larger in comparison with previous generations of mobile AMD platforms.

Q: What you think about chipsets for the Pentium M? Is it possible to compete with Intel's Centrino technology?

A: We have a product to support the Pentium M. That's the SiSM661FX. But, of course, it's not easy to compete with the Centrino platform because Intel “educates” end-users about notebooks with the Centrino logo. That works quite successfully. In the case of AMD, they don't have similar “education programs” for end users, so we can only rely on those users who don't like Intel. But I think that’s going to change in the future since end-users are now better informed about what exactly Centrino is.

In reality, Centrino is just a combination of a low-power processor and a wireless solution. Keeping that in mind, customers can choose a low-power processor from AMD that has better price-performance as well as a wireless solution that may be cheaper than Intel's. Doing it that way not only gives them a viable platform but one that makes economic sense.

Q: Adopting a quite opposite approach from that of another Taiwan-based chipset vendor, SiS has always followed Intel's licensing rules. Do you believe that has been the correct strategy or not?

A: Well, actually we have no choice. If we are to make our products compatible with Intel processors and the Intel front-side bus (FSB), we have to do that on a legal basis. Right now, though, we'd like to focus our resources on product development for AMD platform. That's an important point I'd like to underline once again.

Q: Historically, SiS started as a fabless company, then turned to a fab-based business model, then last year went back to being a fabless design house. What are the key lessons you learned when SiS was manufacturing its own silicon? What prompted the decision to return to the fabless model?

A: Starting our own fab operations was motivated by a wafer-capacity issue. We needed more wafers than our contractors could provide that time. When we had the fab, it gave us some real advantages – for example, we could obtain more engineering samples in a shorter time – which then allowed us to speed up mass production and meet market requirements more easily and so on. The decision to close our fab operations was dictated by the poor economic situation at that time. As you know, maintaining silicon manufacturing facilities requires a lot of investment. So we spun off the fab, and UMC invested in it. As for the lessons we learned at that time, I can say that experience now helps us a lot when we cooperate and work with foundry companies.

Q: What CMOS technology processes will be utilized for current and future generations of SiS chipsets?

A: Currently we use 0.15-micron process for all our products. The transition to 0.13-micron is expected to happen at the end of next year.

Q: Back to products. At the time of its launch in June, the SiS656 was claimed to be the only chipset to support DDR2-667. Does it really matter to be the first with support for advanced memory standards?

A: Well, in this case it did matter, I think, even though DDR2-667 is targeted to be a mainstream solution for 2005. As you know, Intel only supports DDR2-533 in its current chipsets, but the performance is not so good; actually, it’s very similar to that of DDR-400. But DDR2 is very attractive for motherboard vendors, in the first instance because of the power consumption issue. So, after some discussion, we decided to support DDR2 at a higher speed with the SiS656.

Q: Recently the SiS656 was one of four SiS products to pass PCI-SIG PCI Express (PCIe) compatibility certification. What does that mean for SiS? Why wasn't the company included in the so-called PCI Express Integrators List when it was first published by the PCI-SIG at the end of August?

A: Gaining that certification wasn't officially required by our customers, but it did supply proof of our product quality. That's why it really means a lot. We have worked on our implementation of PCI Express technology for a while now, so we believe it's mature. PCI-SIG certification has no official status as an industry standard, but the specs are well known and supported by many major players, so it's almost like a standard. As for why we weren't included in the very first edition of the PCI Express Integrators List, the explanation is easy: at that time the products weren't ready to pass the certification. Less than three months later they were certified.

Q: What you think about the idea of implementing support for PCIe x1 connections in the northbridge? Or do you just follow Intel’s model when you design southbridges for the PCIe architecture?

A: The bandwidth of the northbridge-to-southbridge connection isn't a bottleneck when you use SiS chipsets. We have our own MuTIOL bus technology, which now operates at speeds from 533MBytes/sec to 1GByte/sec. Currently we're developing the next generation of MuTIOL technology, targeted for a bandwidth of 2GBytes/sec and scheduled to become available next year. So we don't need to consider implementing PCIe x1 connections in the northbridge as a way to avoid a bottleneck between the two bridges.

Q: Do you see a future for MuTIOL after you’ve achieved 2GBytes/sec?

A: Sure. The bandwidth of the northbridge-to-southbridge connection depends on the requirements for peripheral connections. A bandwidth of 2GBytes/sec should be enough for four PCIe x1 connections. After that, we’ll see.

Q: Recently, chipsets with integrated graphics grabbed market share from discrete graphics solutions, but that process has been mainly driven by Intel. How do you see a place for SiS in the integrated graphics market?

A: The process is driven by Intel since they do a lot of intense promotion of their integrated solutions. But I don’t think Intel will always be the chief player. At some point in the future there will definitely be an opportunity for SiS. But I should emphasize that we have already made considerable progress with integrated solutions for other platforms as well as the low-end segment.

Q: What you can say about newcomers on the chipset market? I mean Nvidia and ATI.

A: My opinion is that all players need to invest considerable time learning about this market. Technically as well, core logic is more complicated than the graphics subsystem of a PC. However, some nForce MCP chips are quite interesting from a technical point of view.

Q: What do you think about integrated audio features? Now that Intel's Azalia codec has finally been delivered as Intel High Definition Audio technology, will there be opportunities for further developments?

A: Well, what I can tell you is that in the upcoming SiS966 southbridge, expected to begin mass production early next year, we'll have support for Intel High Definition Audio. As you know, this technology has been driven by the emerging market for the Digital Home. Everyone wants to play this game now, and the reason is clear: the regular market for PCs is stagnating. So if the Digital Home concept proves to be successful, why not design something more advanced than Intel High Definition Audio?

Q: 2005 is expected to be a year of dual-core processors. So in conclusion let me ask you about your company’s plans in this area.

A: On the AMD side, the information we have is that they won’t be making any changes in the FSB for dual-core processors. We haven’t received any official specs from Intel yet, but most likely they’ll follow AMD and steer clear of big changes in the FSB. That means we shouldn't need to make many changes to our chipsets to support dual-core CPUs.

http://www.digitimes.com/news/a20041216PR202.html
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Good questions, interesting answers, that´s what an interview should be like. And if Digitimes wouldn´t make their articles "members only" after a few days, I wouldn´t have to post it in full.