Advanced Micro Devices Inc (AMD)

[chipdesigner]

D-step was the "dumb shrink" from 130nm although there were some minor bug fixes and optimizations. E-step is a relayout, together with SSE3 and additional optimizations including additional write-combining buffers. It seems likely that the E-step is the one that incorporates an extra two metal layers as part of the revised layout. AMD has also spoken of a second generation of strain, but I do not know if this is part of the E-step. It would be reasonable.

I would expect frequency increases and lower power consumption, depending on the segment.