Advanced Micro Devices Inc (AMD)

[jhalada]

wbmw,

The difference between today's DP Xeon and IPF SPECfp scores is about 80%. I'm also using the 3M cache version, so that the idea of fitting SPEC within cache is less of an issue.

It is 56% on a single CPU system with 3MB L2 for Itanium, 1MB on Xeon, which, with second FP unit and equal cache would be well within reach.

You can clearly see three floating point units: FPMUL, FPALU, and FPSTORE. Granted, these have specific purposes, but they are designed for the common case, which needs to load and store data as math is performed.

Itanium has 2x of those. Each floating point unit is capable of doing simultaneous FMUL and FADD.

I can't imagine getting much more performance by adding a fourth unit.

Addition would be a second set of these. Or, if the whole FP subsystem is redesigned, it may take a somewhat different shape. Bottom line is that Itanium has resources to do 4 FP operations simultaneously, while Opteron can do only 2.

Joe