Advanced Micro Devices Inc (AMD)

[Petz]

Although the current FP unit has 3 pipelines, it really only has one FP multiplier and one FP adder. SSE3 has some special instuctions for fast FFTs and DCTs, which are transforms used in image processing and video compression (mpegx), amoung other things. These instructions do x+y and x-y simultaneously. A second FP adder would help a lot, or a special combined adder/subtracter might take a little less silicon real estate.

IMO, adding a second FP adder would eliminate the advantage that Power 5 (as you said) and Itanium now have in floating point horsepower. They can each do 4 FOPS per clock, but 2 adds + 2 multiplies is hardly any better than 2 adds + 1 multiply, in most applications. And, of course, Opteron is way ahead of either Itanium or Power 5 in clock speed, and way below them in die size.

Petz