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Re: I_banker post# 46730

Tuesday, 11/02/2004 12:54:45 AM

Tuesday, November 02, 2004 12:54:45 AM

Post# of 97580
Boy ther's a lot of information in that post.

I especially liked:

SPI enables advanced packaging options that require 80 percent less board space and 75 percent fewer electronic connections than traditional Flash devices in standard TSOP packages.

Sounds like the Saifun and Spansion relationship is getting even closer. It sounds like this should be a win for Mirrored flash also. Best thing is that this sounds like an AMD exclusive, no INTC inside.

How is INTC going to be able to compete with this product? Mirrored flash already costs less to produce than Strata and now the chips will be smaller still with less connections.

1 and 2 Mb products are available and more to come in 05. Of course this being a new standard it could take a while to gain traction, but if the cost advantages are what they seem this could turn out to be really big.

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