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Re: j3pflynn post# 43331

Wednesday, 09/01/2004 11:18:18 AM

Wednesday, September 01, 2004 11:18:18 AM

Post# of 97574
65nm reduced leakage

That PR from Intel you quote is interesting:

"The novelty has the same cell size and over 0.5 billion transistors. Transistors have 35nm gates that´s about 1/3 smaller than that of a 90nm crystal. Besides, according to the press release, leakage currents were reduced by 4 times.


The press release stresses the reduced power consumption made possible by sleep transistors feature that disables unused circuits."

Hey I'm sure that 99.9% of transistors in a 70Mbit SRAM are unused at any one time. What the sense amps and an active row+column. There's not even any refresh going on (its SRAM).

This PR seems to skirt the issue of whether an individual transistor has less leakage than an intel one at 90nm. Looks to me they have some major issues at 65nm else the PR would not have that weasel.


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