Advanced Micro Devices Inc (AMD)

[SemiconEng]

I'll accept the nit pick... it is good data.
Remember that AMD is doing 9 metal layers which does add some to the TPT. I did not want to muddy up the explaination.....


That's true, I forgot, additional metal layers would add throuhput time, so that does fit better. My estimate was for 6-8 layer metal. A case of go with what you know I guess


BTW, The last time I was in a fab was Fab 7 in Abq, around 1984. I was playing yield manager at the time. I am sure things have changed quite a bit since then
--Alan


Ah Ha.... I thought I detected a deeper process knowledge then I usually encounter around these parts, or that could be obtained just from web reading. Makes sense now. Whew, 84 huh....? That's almost ancient history. I was still an equipment tech in wafer sort/final test, way back then. I bet you still remember them manually dipping wafers in wet benches, and lighting diffusion furnaces with bic lighters, eh?