Wednesday, August 11, 2004 11:58:37 AM
IDK, just curious.
I don't think it's a sign of any problems on 90nm. on the contrary, I think 90nm yields are better then expected, so there's just too much 90nm capacity, and not enough Prescott sales. Clearly, intel had planned the 90nm ramp for worse yields, and better sales numbers then have materialized. Their comments about 90nm inventory levels, seems to justify that.
In any case, my guess is, that if intel is using an old celeron design on 90nm, then most, if not all of the Litho Masks would need to be redone for a straight shrink to the smaller geometry. This could also allow some additional individual layer layout improvements. I have no clue if that was done, or if intel decided to economize, and just make the new masks as a straight 90nm shrink. Since they seem to not be including any cache, I would guess they are going the economical route, and running some sort of limited pilot runs, to see if the chip will even sell enough to soak up any temporary additional 90nm capacity, and give a return on the investment of making additional masks. If other 90nm sales pick up, expect these chips to disappear into the mist. JMO.
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