Advanced Micro Devices Inc (AMD)

[kpf]

buck

As long as Takayasu Sakurai's (and other's) forecasts remain valid for 65nm, there is not only a small chance for power dissipation going up for given clockspeeds.
Parallization allowing to increase performance while reducing clockspeeds is one obvious way to work around the problem for a while, multithreshold transistor design another. A lucky breakthrough in materials or geometrical designs is always possible, but not predictable. Multi-fin-fet geometries will probably ease things, but that is still couple of years out.

K.