Transmeta (Semiconductor) (TMTA)

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Nano Device Laboratories director: Microelectronics industry faces five great challenges

Janet Wang, Hsinchu; Jane Wang, DigiTimes.com [Friday 22 March 2002]

As the semiconductor industry shifts focus from micron technology to nanotechnology and materials, Taiwan’s leading semiconductor research lab National Nano Device Laboratories director Simon M. Sze forecasts that DRAM technology development will reach a bottleneck at 64GB, two to three DRAM generations from now. In memory capacity, flash memory will overtake DRAM in five years, Sze predicts.

According to Sze, the microelectronics industry will face five great challenges in wafer surface area enlargement, nano-level photo-lithography technology, nano-level component technology, interconnect technology and cost considerations.

In nano-level photo-lithography technology, it is no longer a question of shortening wavelength, but the light source itself must be reconsidered. To accommodate production technology going up from 0.13 to 0.1 all the way to 0.07-micron (70nm), photo-lithography equipment wavelength must also decrease correspondingly from 248nm, 193nm, down to 157nm.

In the future, laser technology must also evolve to accommodate the more advanced technology, Sze stated, as EUV (extreme ultraviolet) light may become a solution for 70nm or even 10nm production technology.

Building one wafer fab cost US$750 million in 1995 and US$3 billion in 2001 and may cost US$24 billion by 2010. Only a larger application market will be able to support the investment in and construction of new wafer fabs.

http://www.digitimes.com/NewsShow/Article.asp?IR=N&ClassID=100&datePublish=2002/03/20&pa...