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Re: jhalada post# 35169

Monday, 05/17/2004 1:43:54 PM

Monday, May 17, 2004 1:43:54 PM

Post# of 97833
I wonder if AMD's cache design and cache coherency architecture fully exploits the knowledge about the way memory pages are "marked." For example, if a page is marked as "no write," then a CPU doesn't have to do any snoops to find a newer copy in someone else's L2.

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