Intel Corp (INTC)

[wbmw]

Nehalem vs. Shanghai Die Analysis

http://chip-architect.com/news/Shanghai_Nehalem.jpg

I found the cache density numbers to be interesting. Intel gets 1MB of L3 cache into 5.7 mm^2, while AMD takes up 7.5 mm^2 per 1MB for theirs. It means Intel's cache cells are 24% smaller.

It allows Intel to have much larger cores and more cache, while still having about equivalent die size (Nehalem @ 246 mm^2 and Shanghai @ 243 mm^2):