Intel Corp (INTC)

[alan81]

How CSI is better than HT...
Here is a list I made... any feedback?
RAS features
- If a clock line fails a data line can be used to replace it
- CSI allows hotplug
- virtual channels (allows eliminating livelock and deadlock situations)

Performance / power features:
- Bandwidth of about 4X Ht 2.0 and 1.5X HT 3.0
- Reduced snoop latency by allowing snoop packets to interleave with data
- "more" symetrical I/O (two or more CPU's connect to IO hub/hubs)
- can design systems with large numbers of CPU's (David describes one topology that would be 32 CPU's, or 256 cores, or with Nehalem 512 threads.) This is implemented via a fourth link.
- power down and sleep states available
- I/O or remote devices can "tell" the CPU what to prefetch

cost features:
- Bit swizzling to allow easier board layout (mirror the CSI port)

Future proofing:
- protocols and methods that are compatable with optical interconnects