Rambus (RMBS)

[calbiker]

Getting back to the effect of latency on effective bandwidth.

DDR400 latency 30 nsec
XDR latency 27.5 nsec
max bandwidth for DDR400 400 Mb/sec per bitline
max bandwidth for XDR 3.2 3200 Mb/sec per (pair of) bitlines

(correct me if wrong. I am not very good at this)

I don't know what the hell you're doing with XDR in that table, it sure looks wrong. Lets compare a DDR400 DIMM to a XDR3.2 XDIMM (using the latencies listed above). The XDIMM transfers 4 bytes while the DIMM transfers 8 bytes per data transfer. So instead of listing the number of bursts (as you have done), I'll list the actual bytes transfered. The peak bandwidth of DDR400 is 3.2 GB/s, and the peak bandwidth of XDR3.2 is 12.8 GB/s. Time is in units of ns, and bandwidth in units of GB/s.

 
           .........DDR400......      ..........XDR3.2...... 
 #Bytes    Time  eff BW  eff BW/Peak  Time  eff BW  eff BW/Peak 
      8    32.5  0.246   0.077        28.1  0.28    0.022 
     16    35.0  0.457   0.143        28.8  0.56    0.043 
     32    40.0  0.8     0.25         30.0  1.07    0.083 
     64    50.0  1.28    0.4          32.5  1.97    0.154 
    128    70.0  1.83    0.57         37.5  3.41    0.267   
   1024   350.0  2.93    0.91        107.5  9.53    0.744 

The ratio eff BW to Peak (which you seem to believe is a big deal) has little meaning. Time is the only thing that's important in a performance system. It doesn't matter how many bytes are read from memory, XDR is always faster. It's 87% faster in transferring 128 bytes, and 225% faster when transferring 1024 bytes.

Hey Cor, better pull out the GDDR3, the other stuff (DDR400) is way too slow. Ha.

Obviously in a PC application, DDR interfaces are wider than XDR interfaces and the whole of the memory system will be made such that the max bandwidth is close to that of the FSB of the processor. If one has applications with short bursts, XDR seems to be at a disadvantage here in that application (in fact any fast memory is unless latency decreases in the same order of magnitude as the max.bandwidth increases).

No, that's wrong. I've shown that no matter how small the data burst, the XDR system is still faster. It should be quite obvious to you as the read latency of XDR is less than the read latency of DDR400 (27.5 ns vs. 30 ns).