Monday, February 26, 2007 7:02:27 PM
To date, the NAND flash has been built in predominantly MICRON factories, and I suspect it will stay that way. In terms of graphics, the process would be the same as a CPU process. Regarding the pad discussion, I think AMD has shown you can do a dual channel integrated memory controller and stay under 1000 pins... Any serial interconnect Intel would use should be higher bandwidth per pin than the current HT. --Alan
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