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Post# of 97833
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Re: Tim Fowler post# 16423

Friday, 10/31/2003 6:32:58 PM

Friday, October 31, 2003 6:32:58 PM

Post# of 97833
Tim, What's your opinion?

Depends on where the latency is measured from.

What's the latency from CPU to chipset? One MOBO cycle or more?

What's the latency in the chipset? One MOBO cycle or more?

How often is cache refreshed from MM?

What's the overall latency between cpu looking in cache and getting data from Main Memory in each case, anyway?

It's too %#*& complicated for me to figure out. What's your best guess?

sgolds, What's your opinion, also as long as I'm wasting electrons?

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