$GTCHD Our idea is to address potential design issues, early during the design phase. GBT’s team is currently working on a software tool to analyze and identify design rule violations during the IC layout construction phase. Similar to the 'spell-check' highlight concept, our tool will highlight potential violations as the designer is constructing and building the integrated circuit layout blocks. Although not a new concept, we will introduce a new approach that visually analyzes and alerts areas-of-interest associated with potential design violations.
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