Tuesday, January 30, 2007 9:54:29 PM
I think all the new features that are in Penryn (whatever they turn out to be) are in the existing conroe design, but not yet validated or functioning in current silicon. There are just not enough transistors available to have changed the design...
Hard to understand how features can be designed in without transistors. However, i agree in your understanding many features to be deployed in Penryn are in CMW-design already. Been told A0-Silicon of Penryn is best understood as being a revision of CMW at 65nm with 45nm cache attached. In so far i followed recent discussions of how fast current silicon can run soandsomuch Os's and apps with somewhat limited interest. :)
K.
Facts are irrelevant to the emotional brain
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