Advanced Micro Devices Inc (AMD)

[Tim Fowler]

And old article but I'm still interested in hearing if people think this is accurate -

Between Intel And AMD

An interesting tidbit on the side is that Intel's P4 architecture, using all kinds of optimizations, including hardware-based dynamic speculative precomputing for branch-prediction and prefetching will be hurt less than AMD by the high latencies of DDR II. To spin this a bit further, the main advantage of AMD's Hammer architecture is the integration of the memory controller onto the CPU with the goal of reducing chipset-related (control and address decode) latencies. It only requires second grade math skills to see that shaving off one cycle out of nine (1/9) on the controller level for an initial access will yield less performance gain than reducing latencies by one cycle out of five (1/5) .

The difference between AMD and Intel, though, is that Intel is actively participating in defining (say: "bullying") the memory specifications of the future regardless of the cost concerns of the DRAMurai. AMD, on the other hand, whenever we asked them, appeared to be mostly concerned with staying mainstream and swallowing whatever was served by the DRAM makers as the best roadmap. Clearly, with helping the memory industry to make the cheapest possible DRAM, AMD will not win performance or market share. Intel has learned this lesson many years ago, and even though Rambus faltered in the end, Intel got more mileage out of them than anybody will ever admit. VIA Technologies are pursuing QBM (quad band memory, invented and heralded by Kentron) with high bandwidth and low latencies, and where is AMD?

Realistically, there is a solution for AMD. Low latency processors and controllers require low latency memory. It is as easy as that and we ........ well, we do have some suggestions.

(to be continued some two years down the road)

http://www.lostcircuits.com/memory/ddrii/8.shtml