Advanced Micro Devices Inc (AMD)

[sgolds]

YB, it would not make sense to market a low cache version on socket 939. Here are my reasons:

1. This is intended as a high performance part, hence the dual memory controllers. True, faster DRAM can compensate for less cache, but that would be one real confusing message for the buying public.

2. 90 nm is following quick on the heels of this product, with production starting by mid year. There is a very short window of opportunity for mass production of small socket 939 dice.

3. Q1 and Q2 are the slow quarters of the year. To keep up ASPs, production should be dampened a bit anyhow. (In previous years, AMD had inventory problems from these quarters.)

Having noted that, I do think there is a useful small cache part that AMD could market - socket 754 32-bit K8 (Celeron space). Take the existing K8, reduce cache, disable 64-bit extensions. This moves the entire product line to the new motherboard design and the same manufacturing processes. It would be a useful product on 130 or 90nm. Probably best on 90nm because it would be ready for H2 when the market naturally expands, and it would soak up extra production at a time it is coming online.