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Re: Unkwn post# 150724

Thursday, 11/21/2019 4:41:17 PM

Thursday, November 21, 2019 4:41:17 PM

Post# of 151686
Generally agree on the TSMC 7nm comments, however it is interesting to note that both the Apple A12 and the AMD chiplet are fairly small die at around 80mm, while the A13 moves up to about 90. The Icelake 10nm cpu is closer to 120 so INTC is manufacturing a larger die size on 10nm than TSMC is on 7nm.

In terms of total capacity we can look at CAPEX as an indicator. Intel outspent TSMC in 2018 $15B to about $10B for TSMC. In 2019 they were about tied at $15B. Based on this I would expect them to have similar wafer capacity, if not more for INTC.

Icelake mobile clock rate is likely limited by more than process. They increased the cache size which may be the clock rate limiter. The GPU on icelake is a monster compared to previous mobile chips so that is taking a much bigger chunk of the power budget. With a 15% bump in IPC the sunnycove architecture looks very nice, but I do agree many will make a decision based on clock rate rather than performance.

I hear a lot about "Intel failure", but it seems to me the primary problem is they were much too aggressive on 10nm design rules. I am encouraged by them being too aggressive rather than slow and stodgy. The icelake mobile part looks like a real winner with much better everything than AMD is offering. Project Athena laptops are pretty impressive.
Alan
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