The Hunt for the Next 10 Bagger

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$GFOO NEW CEO RUNS ANOTHER CO THAT'S WORTH ALMOST $1.5 BILLION,

OWNS SEVERAL KEY PATENTS / INTELLECTUAL PROPERTY AND THE NEVADA

SECRETARY OF STATE JUST REINSTATED $GFOO 's CHARTER ON 09/21/2017

NEW CEO - 
https://www.otcmarkets.com/edgar/GetFilingPdf?FilingID=12216648


COMPANY REINSTATED ON 09/21/2017 BY NVSOS

Entity Actions for "GENUFOOD ENERGY ENZYMES CORP"  

LOOKS LIKE A REVERSE MERGER IS TAKING PLACE. NO NEWS HAS BEEN PUT OUT YET!


Sort by   File Date  Document Number  Action Type   descending
ascending order 
1 - 14 of 14 actions   Actions\ Amendments Action Type:  Reinstatement
Document Number:  20170400686-34# of Pages:  1. File Date:  9/21/2017 Effective Date:  (No notes for this action) Action Type:  Annual List

Document Number:  20170400687-45# of Pages:  1File Date:  9/21/2017
Effective Date:  17/18

Action Type:  Acceptance of Registered Agent Document Number:  20170400787-56# of Pages:  1File Date:  9/21/2017 Effective Date: 


http://nvsos.gov/sosentitysearch/corpActions.aspx?lx8nvq=qDpp60ra6IvRyjUMURZhug%253d%253d&CorpName=GENUFOOD+ENERGY+ENZYMES+CORP       ;


Ching Ming Hsu "James"

President/CEO/CFO,

 Genufood Energy Enzymes Corp
CEO Effective AS OF August 2017

https://www.bloomberg.com/profiles/people/20139385-ming-hsu-ching       ;
Ching Ming Hsu
Director, Honmyue Enterprise Co., Ltd.
Mr. Ching Ming Hsu is President & Investor Relations Officer at New Palace International Co. Ltd. He is on the Board of Directors at Honmyue Enterprise Co., Ltd.
He received his graduate degree from Tunghai University.

THIS COMPANY RUN BY OUR NEW CEO IS PROFITABLE AND PAYS A 5% DIVIDEND YIELD!!!
Previous Close 11.45
Open --
Volume --
3m Avg Volume 275,274
Today’s High --
Today’s Low --
52 Week High 13.50
52 Week Low 9.95
Shares Out (mil) 129.90
Market Cap (mil) 1,474.33
Forward P/E 13.91
Dividend (Yield %) 0.60 ( 5.29 )


2:45 PM CST 09/25/17
NT$11.45 TWD
+0.10 +0.88%
Volume 235,000
Volume 235,000
65 Day Avg Vol312,222
1 Day Range 11.35 - 11.50
52 Week Range9.95 - 13.50


KEY RATIOS
Price to Earnings (TTM)
vs sector
13.91

19.84

Price to Sales (TTM)
vs sector
0.47

4,450.06

Price to Book (MRQ)
vs sector
0.81

2.33

Price to Cash Flow (TTM)
vs sector
7.57

497,800.18

Total Debt to Equity (MRQ)
vs sector
55.21

68.37

LT Debt to Equity (MRQ)
vs sector
3.53

32.30

Return on Investment (TTM)
vs sector
5.35

11.00

Return on Equity (TTM)
vs sector

IS THIS A REVERSE MERGER PLAY? INACTIVE ENTITY FOR ABOUT 2 YEARS WAS JUST REINSTATED WITH A NEW CEO THAT HAS

SIGNIFICANT EXPERTIES AND INTELLECTUAL PROPERTY.

PATENTS OWNED BY CEO ARE QUITE INTRIGUING!


Patents by Inventor Ching-Ming Hsu
Ching-Ming Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

OFFLINE-OPERABLE WIRELESS NETWORK SYSTEM AND METHOD FOR OPERATING THE SAME
Publication number: 20170265123
Abstract: The present invention relates to an offline-operable wireless network system and. the method for operating the same. When a wireless base station is not connected to the evolved packet core (EPC) server, the wireless base station will emulate the EPC server. Thereby, the electronic device connected with the wireless base station can be connected to the emulated EPC server, so that the wireless network functions still can be applied in the offline state and a wireless local area network can be further built.
Type: Application
Filed: May 13, 2016
Publication date: September 14, 2017
Inventors: CHING-SUNG HSU, SHIH-CHIANG YANG, PAO-CHING TSENG, FU-MING YEH
Semiconductor light emitting device and method of fabricating the same
Patent number: 9735312
Abstract: A method of manufacturing a semiconductor light-emitting device, comprises the steps of providing a first substrate; providing multiple epitaxial units on the first substrate, wherein the plurality of epitaxial units comprises: multiple first epitaxial units, wherein each of the first epitaxial units has a first geometric shape and a first area; and multiple second epitaxial units, wherein each of the second epitaxial units has a second geometric shape and a second area; providing a second substrate with a surface; transferring the multiple second epitaxial units to the surface of the second substrate; and dividing the first substrate to form multiple first semiconductor light-emitting devices, wherein each of the first semiconductor light-emitting devices has the first epitaxial unit; wherein the first geometric shape is different from the second geometric shape, or the first area is different from the second area.
Type: Grant
Filed: July 3, 2013
Date of Patent: August 15, 2017
Assignee: EPISTAR CORPORATION
Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
Apparatus and method for reducing optical cross-talk in image sensors
Patent number: 9711562
Abstract: A method includes forming a plurality of pixels formed on a front surface of a semiconductor substrate, forming an array of color filters over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels, forming a plurality of micro-lenses over the array of color filters, and forming a second layer between the pixels and the color filters. The second layer further includes a structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens, further wherein the plurality of micro-lenses are in contact with the array of color filters, and wherein the structure and the transparent material are coplanar at respective top surfaces thereof, and further wherein the structure directly contacts a bottom surface of at least one of the color filters.
Type: Grant
Filed: October 17, 2016
Date of Patent: July 18, 2017
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
Inventors: Chin-Min Lin, Ching-Chun Wang, Dun-Nian Yaung, Chun-Ming Su, Tzu-Hsuan Hsu
COATING APPARATUS FOR CONTINUOUSLY FORMING A FILM THROUGH CHEMICAL VAPOR DEPOSITION
Publication number: 20170191162
Abstract: A coating apparatus for continuously forming a film through chemical vapor deposition (CVD) includes a conveyor unit for conveying a substrate along a moving path, a deposition unit and a film formation-prohibiting unit. The deposition unit is disposed on the moving path and includes a deposition chamber adapted for receiving the substrate and forming a film on the substrate through CVD. The film formation-prohibiting unit includes a heating mechanism that is disposed in the deposition chamber for maintaining the conveyor unit at a film formation-prohibiting temperature.
Type: Application
Filed: December 30, 2015
Publication date: July 6, 2017
Inventors: TING-PIN CHO, WEN-CHENG KUO, KUNG-MING HSU, CHING-FU YANG, JYH-NAN SHIEH
Semiconductor structure and method for manufacturing the same
Patent number: 9691704
Abstract: A semiconductor structure comprises a first wire level, a second wire level and a via level. The first wire level comprises a first conductive feature. The second wire level is disposed on the first wire level. The second wire level comprises a second conductive feature and a third conductive feature. The via level is disposed between the first wire level and the second wire level. The via level comprises a via connecting the first conductive feature and the second conductive feature. There is a first air gap between the first conductive feature and the second conductive feature. There is a second air gap between the second conductive feature and the third conductive feature. The first air gap and the second air gap are linked.
Type: Grant
Filed: June 7, 2016
Date of Patent: June 27, 2017
Assignee: UNITED MICROELECTRONICS CORP.
Inventors: Kuo-Chih Lai, Chia-Chang Hsu, Nien-Ting Ho, Ching-Yun Chang, Yen-Chen Chen, Shih-Min Chou, Yun-Tzu Chang, Yang-Ju Lu, Wei-Ming Hsiao, Wei-Ning Chen
Polishing pad with offset concentric grooving pattern and method for polishing a substrate therewith
Patent number: 9687956
Abstract: The invention provides a polishing pad and a method of using the polishing pad for chemically-mechanically polishing a substrate. The polishing pad comprises a plurality of grooves composed of at least a first plurality of concentric grooves having a first center of concentricity, and a second plurality of concentric grooves having a second center of concentricity. The first center of concentricity is not coincident with the second center of concentricity, the axis of rotation of the polishing pad is not coincident with at least one of the first center of concentricity and the second center of concentricity, the plurality of grooves does not consist of a continuous spiral groove, and the polishing surface does not comprise a mosaic groove pattern.
Type: Grant
Filed: November 5, 2013
Date of Patent: June 27, 2017
Assignee: Cabot Microelectronics Corporation
Inventors: Ching-Ming Tsai, Shi-Wei Cheng, Kun-Shu Yang, Jia-Cheng Hsu, Sheng-Huan Liu, Feng-Chih Hsu, Craig Kokjohn
METHOD OF FORMING DEEP TRENCH ISOLATION IN RADIATION SENSING SUBSTRATE AND IMAGE SENSOR DEVICE
Publication number: 20170154917
Abstract: A method of forming a deep trench isolation in a radiation sensing substrate includes: forming a trench in the radiation sensing substrate; forming a corrosion resistive layer in the trench, in which the corrosion resistive layer includes titanium carbon nitride having a chemical formula of TiCxN(2?x), and x is in a range of 0.1 to 0.9; and filling a reflective material in the trench and over the corrosion resistive layer.
Type: Application
Filed: February 19, 2016
Publication date: June 1, 2017
Inventors: Chi-Ming LU, Chih-Hui HUANG, Jung-Chih TSAO, Yao-Hsiang LIANG, Chih-Chang HUANG, Ching-Ho HSU
MICROFLUIDIC DUAL-WELL DEVICE FOR HIGHTHROUGHPUT SINGLE-CELL CAPTURE AND CULTURE
Publication number: 20170145363
Abstract: A microfluidic dual-well device is disclosed. The device comprises: (a) a first substrate having a first end, a second end, and a culture microwell forming portion; (b) a plurality of culture microwells; (c) a second substrate having a first end, a second end, and a capture microwell forming portion, the two ends of the second substrate being respectively bounded to the two ends of the first substrate; (d) a plurality of capture microwells; (e) a microfluidic channel; (f) a microfluidic inlet port; and (g) a microfluidic outlet port; wherein the microfluidic channel is in fluidic connections with the culture microwells, the capture microwells, and the inlet and outlet ports. Methods of capturing and transferring a single cell or a single cell colony for culture, and method of transferring a target cell from a polydimethylsiloxane (PDMS) structure of culture microwells to a culture plate for culture are also disclosed.
Type: Application
Filed: May 19, 2016
Publication date: May 25, 2017
Inventors: Chia-Hsien HSU, Ching-Hui LIN, Duane S. JUANG, Hao-Chen CHANG, Ing-Ming CHIU
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
Publication number: 20170148891
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region, a second region, a third region, and a fourth region; forming a tuning layer on the second region; forming a first work function metal layer on the first region and the tuning layer of the second region; forming a second work function metal layer on the first region, the second region, and the fourth region; and forming a top barrier metal (TBM) layer on the first region, the second region, the third region, and the fourth region.
Type: Application
Filed: November 24, 2015
Publication date: May 25, 2017
Inventors: Kuo-Chih Lai, Yun-Tzu Chang, Wei-Ming Hsiao, Nien-Ting Ho, Shih-Min Chou, Yang-Ju Lu, Ching-Yun Chang, Yen-Chen Chen, Kuan-Chun Lin, Chi-Mao Hsu
Semiconductor process of forming metal gates with different threshold voltages and semiconductor structure thereof
Patent number: 9659937
Abstract: A semiconductor process of forming metal gates with different threshold voltages includes the following steps. A substrate having a first area and a second area is provided. A dielectric layer and a first work function layer are sequentially formed on the substrate of the first area and the second area. A second work function layer is directly formed on the first work function layer of the first area. A third work function layer is directly formed on the first work function layer of the second area, where the third work function layer is different from the second work function layer. The present invention also provides a semiconductor structure formed by said semiconductor process.
Type: Grant
Filed: April 9, 2015
Date of Patent: May 23, 2017
Assignee: UNITED MICROELECTRONICS CORP.
Inventors: Ching-Yun Chang, Chi-Mao Hsu, Wei-Ming Hsiao, Nien-Ting Ho, Kuo-Chih Lai
3D IMAGE APPARATUS AND METHOD FOR DISPLAYING IMAGES
Publication number: 20140192033
Abstract: A three-dimensional (3D) image apparatus is provided. The 3D image apparatus includes a display unit, a front camera, and a processor. The front camera captures an image of the eyes of the user. The processor is coupled to the display unit and the front camera. The processor determines the position of the eyes of the user based on the image of the eyes of the user, and determines whether to display a 3D image or a two-dimensional (2D) image on the display based on the position of the eyes of the user.
Type: Application
Filed: January 7, 2013
Publication date: July 10, 2014
Applicant: HTC CORPORATION
Inventors: Ching-Ming Hsu, Yi-Yuan Hsieh, Po-Chang Ho
Fabrication method and structure of an ITO anode containing nickel points for an OLED to selectively light
Patent number: 7615285
Abstract: A fabrication method of an indium tin oxide (ITO) anode containing point nickel for an organic light emitting diode (OLED) to selectively light includes various processes of preparing an ITO substrate with an anode having plural point grooves, of forming a nickel film on the anode, and of grinding the nickel film to leave the point grooves fitted with nickel. Therefore, the nickel spots of the ITO anode are lit up earlier than the pure ITO anode when the OLED is turn on. Because the nickel spots have a lower resistance, current can aggregate in these spots collectively, reducing demerit of cross-talk happening often in a conventional passive OLED panel circuit. The structure of the OLED includes an ITO substrate with an anode provided point grooves deposited with nickel, a hole transport layer on the anode, and an electron transport layer on the hole transport layer.
Type: Grant
Filed: June 21, 2006
Date of Patent: November 10, 2009
Assignee: Southern Taiwan University
Inventors: Ching-Ming Hsu, Wen-Tuan Wu, Chung-Lin Tsai
Fabrication method and structure of an ITO anode containing nickel points for an OLED to selectively light
Publication number: 20070298222
Abstract: A fabrication method of an indium tin oxide (ITO) anode containing point nickel for an organic light emitting diode (OLED) to selectively light includes various processes of preparing an ITO substrate with an anode having plural point grooves, of forming a nickel film on the anode, and of grinding the nickel film to leave the point grooves fitted with nickel. Therefore, the nickel spots of the ITO anode are lit up earlier than the pure ITO anode when the OLED is turn on. Because the nickel spots have a lower resistance, current can aggregate in these spots collectively, reducing demerit of cross-talk happening often in a conventional passive OLED panel circuit. The structure of the OLED includes an ITO substrate with an anode provided point grooves deposited with nickel, a hole transport layer on the anode, and an electron transport layer on the hole transport layer.
Type: Application
Filed: June 21, 2006
Publication date: December 27, 2007
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